vendor_name = ModelSim
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/VGA_DRIVER.v
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/DE0_NANO.v
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/DE0_NANO.SDC
source_file = 1, DE_NANO_SOPC.qip
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/Dual_Port_RAM_M9K.v
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/IMAGE_PROCESSOR.v
source_file = 1, myfirstpll.qip
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/pll.qip
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/PLL.v
source_file = 1, C:/Users/JoshyD/Documents/School/Research/Summer 2018/CV-with-FPGA/Lab3_FPGA_Template/db/DE0_NANO.cbx.xml
design_name = DE0_NANO
instance = comp, \GPIO_0_D[0]~output , GPIO_0_D[0]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[1]~output , GPIO_0_D[1]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[2]~output , GPIO_0_D[2]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[3]~output , GPIO_0_D[3]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[4]~output , GPIO_0_D[4]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[5]~output , GPIO_0_D[5]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[6]~output , GPIO_0_D[6]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[7]~output , GPIO_0_D[7]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[8]~output , GPIO_0_D[8]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[9]~output , GPIO_0_D[9]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[10]~output , GPIO_0_D[10]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[11]~output , GPIO_0_D[11]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[12]~output , GPIO_0_D[12]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[13]~output , GPIO_0_D[13]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[14]~output , GPIO_0_D[14]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[15]~output , GPIO_0_D[15]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[16]~output , GPIO_0_D[16]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[17]~output , GPIO_0_D[17]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[18]~output , GPIO_0_D[18]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[19]~output , GPIO_0_D[19]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[20]~output , GPIO_0_D[20]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[21]~output , GPIO_0_D[21]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[22]~output , GPIO_0_D[22]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[23]~output , GPIO_0_D[23]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[24]~output , GPIO_0_D[24]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[25]~output , GPIO_0_D[25]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[26]~output , GPIO_0_D[26]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[27]~output , GPIO_0_D[27]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[28]~output , GPIO_0_D[28]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[29]~output , GPIO_0_D[29]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[30]~output , GPIO_0_D[30]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[31]~output , GPIO_0_D[31]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[32]~output , GPIO_0_D[32]~output, DE0_NANO, 1
instance = comp, \GPIO_0_D[33]~output , GPIO_0_D[33]~output, DE0_NANO, 1
instance = comp, \CLOCK_50~input , CLOCK_50~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[0]~input , GPIO_1_D[0]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[1]~input , GPIO_1_D[1]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[2]~input , GPIO_1_D[2]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[3]~input , GPIO_1_D[3]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[4]~input , GPIO_1_D[4]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[5]~input , GPIO_1_D[5]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[6]~input , GPIO_1_D[6]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[7]~input , GPIO_1_D[7]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[8]~input , GPIO_1_D[8]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[9]~input , GPIO_1_D[9]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[10]~input , GPIO_1_D[10]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[11]~input , GPIO_1_D[11]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[12]~input , GPIO_1_D[12]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[13]~input , GPIO_1_D[13]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[14]~input , GPIO_1_D[14]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[15]~input , GPIO_1_D[15]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[16]~input , GPIO_1_D[16]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[17]~input , GPIO_1_D[17]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[18]~input , GPIO_1_D[18]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[19]~input , GPIO_1_D[19]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[20]~input , GPIO_1_D[20]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[21]~input , GPIO_1_D[21]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[22]~input , GPIO_1_D[22]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[23]~input , GPIO_1_D[23]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[24]~input , GPIO_1_D[24]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[25]~input , GPIO_1_D[25]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[26]~input , GPIO_1_D[26]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[27]~input , GPIO_1_D[27]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[28]~input , GPIO_1_D[28]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[29]~input , GPIO_1_D[29]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[30]~input , GPIO_1_D[30]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[31]~input , GPIO_1_D[31]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[32]~input , GPIO_1_D[32]~input, DE0_NANO, 1
instance = comp, \GPIO_1_D[33]~input , GPIO_1_D[33]~input, DE0_NANO, 1
instance = comp, \KEY[0]~input , KEY[0]~input, DE0_NANO, 1
instance = comp, \KEY[1]~input , KEY[1]~input, DE0_NANO, 1
